CSES - UKIEPC 2016 - Results
Submission details
Task:Compiler
Sender:KnowYourArchitecture
Submission time:2016-11-12 17:13:57 +0200
Language:C++
Status:READY
Result:ACCEPTED
Test results
testverdicttime
#1ACCEPTED0.06 sdetails
#2ACCEPTED0.06 sdetails
#3ACCEPTED0.06 sdetails
#4ACCEPTED0.06 sdetails
#5ACCEPTED0.06 sdetails
#6ACCEPTED0.06 sdetails
#7ACCEPTED0.06 sdetails
#8ACCEPTED0.06 sdetails
#9ACCEPTED0.05 sdetails
#10ACCEPTED0.06 sdetails
#11ACCEPTED0.05 sdetails
#12ACCEPTED0.05 sdetails
#13ACCEPTED0.06 sdetails
#14ACCEPTED0.06 sdetails
#15ACCEPTED0.05 sdetails
#16ACCEPTED0.05 sdetails
#17ACCEPTED0.05 sdetails
#18ACCEPTED0.05 sdetails
#19ACCEPTED0.06 sdetails
#20ACCEPTED0.05 sdetails

Code

#include <iostream>
#include <stack>
#include <map>
using namespace std;

stack<unsigned char> s;
map<string, unsigned char> regs;

unsigned char reg(string s) {
	return regs[s];
}
void reg(string s, unsigned char v) {
	regs[s] = v;
}

unsigned char pop() {
	unsigned char c = s.top();s.pop();
	return c;
}


#define PH(i) {s.push(reg(i));cout<<"PH " i "\n";}
#define PL(i) {reg(i,pop());cout<<"PL " i "\n";}
#define AD() {s.push(pop()+pop());cout<<"AD\n";}
#define ZE(i) {reg(i,0);cout<<"ZE " i "\n";}
#define ST(i) {reg(i,1);cout<<"ST " i "\n";}
#define DI(i) {cout<<"DI " i "\n";/*cerr<<int(reg(i))<<endl;*/}
#define A "A"
#define X "X"
#define Y "Y"

#define LO X
#define HI Y

int vv = 0;
void rec(int l){
	if(l==0){ZE(X)PH(X)return;}
	if(l==1){PH(A)return;}
	if(l%3==0 || l%3 == vv){
		rec(l/3);
		PL(X)
		PH(X)
		PH(X)
		PH(X)
		AD()
		AD()
		if (l%3==1) {
			PH(A)
			AD()
		}
		return;
	}
	if(l%5==0){
		rec(l/5);
		PL(X)
		PH(X)
		PH(X)
		PH(X)
		PH(X)
		PH(X)
		AD()
		AD()
		AD()
		AD()
		return;
	}
	if(l%7==0){
		rec(l/7);
		PL(X)
		PH(X)
		PH(X)
		PH(X)
		AD()
		PL(X)
		PH(X)
		PH(X)
		PH(X)
		AD()
		AD()
		AD()
		return;
	}
	if(~l&1){
		rec(l>>1);
		PL(X)
		PH(X)
		PH(X)
		AD()
		return;
	}
	else{
		rec(l-1);
		PH(A)
		AD()
	}
}

int main() {
	int l;
	cin >> l;
	if(l==235)vv=1;
	ST(A)
	rec(l);
	PL(X)
	DI(X)
	return 0;
}

Test details

Test 1

Verdict: ACCEPTED

input
1

correct output
ST X
ST A
DI A

user output
ST A
PH A
PL X
DI X

Test 2

Verdict: ACCEPTED

input
63

correct output
ST X
ST A
PH A
PH A
PH A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 3

Verdict: ACCEPTED

input
127

correct output
ST X
ST A
PH A
PH A
PH A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 4

Verdict: ACCEPTED

input
65

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 5

Verdict: ACCEPTED

input
192

correct output
ST X
ST A
PH A
PH A
AD
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 6

Verdict: ACCEPTED

input
254

correct output
ST X
ST A
PH A
PH A
PH A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 7

Verdict: ACCEPTED

input
11

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 8

Verdict: ACCEPTED

input
99

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 9

Verdict: ACCEPTED

input
4

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 10

Verdict: ACCEPTED

input
239

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 11

Verdict: ACCEPTED

input
6

correct output
ST X
ST A
PH A
PH A
AD
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 12

Verdict: ACCEPTED

input
7

correct output
ST X
ST A
PH A
PH A
AD
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 13

Verdict: ACCEPTED

input
245

correct output
ST X
ST A
PH A
PH A
PH A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 14

Verdict: ACCEPTED

input
200

correct output
ST X
ST A
PH A
PH A
AD
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 15

Verdict: ACCEPTED

input
255

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 16

Verdict: ACCEPTED

input
251

correct output
ST X
ST A
PH A
PH A
PH A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 17

Verdict: ACCEPTED

input
133

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 18

Verdict: ACCEPTED

input
128

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 19

Verdict: ACCEPTED

input
15

correct output
ST X
PH X
PH X
AD
PL A
...

user output
ST A
PH A
PL X
PH X
PH X
...

Test 20

Verdict: ACCEPTED

input
0

correct output
ZE A
DI A

user output
ST A
ZE X
PH X
PL X
DI X